The VMIL workshop is a forum for research in virtual machines and intermediate languages. It is dedicated to identifying programming mechanisms and constructs that are currently realized as code transformations or implemented in libraries but should rather be supported at VM level. Candidates for such mechanisms and constructs include modularity mechanisms (aspects, context-dependent layers), concurrency (threads and locking, actors, capsules, processes, software transactional memory), transactions, development tools (profilers, runtime verification), etc. Topics of interest include the investigation of which such mechanisms are worthwhile candidates for integration with the run-time environment, how said mechanisms can be elegantly (and reusably) expressed at the intermediate language level (e.g., in bytecode), how their implementations can be optimized, and how virtual machine architectures might be shaped to facilitate such implementation efforts.
Accepted Papers
Call for Papers
Abstract
The Workshop on Virtual Machines and Intermediate Languages (VMIL) is a forum for research in virtual machines and intermediate languages. It focuses on novel ideas on modular approaches to programming language implementation and optimization, extensible virtual machines, as well as reusable runtime components. VMIL also investigates programming language mechanisms or dynamic tooling facilities that are currently implemented as code transformations or in libraries but are worthwhile candidates for integration with the run-time environment. VMIL’s area of interest includes exploration how said mechanisms can be elegantly (and reusably) expressed at the intermediate language level (e.g., in bytecode), how their implementations can be optimized, and how virtual machine architectures might be shaped to facilitate such implementation efforts. Examples of such mechanisms are concurrency constructs (e.g. actors, capsules, processes, software transactional memory), transactions, and development tools (profilers, runtime verification).
Topics of Interest
Topics of interest include, but are not limited to:
- Modular compilation-based and interpreter-based virtual machine designs
- Intermediate language constructs that better support programming language level features
- Reusable implementation of runtime components (e.g. interpreters, garbage collectors, intermediate representations)
- Static and dynamic compiler techniques for different languages
- Tooling support for different languages (e.g. debugging, profiling, etc.)
- Modular language implementations that use existing frameworks and systems
- New research ideas on how we want to build languages in the future.
Paper Categories
In these key areas, we invite high-quality papers in the following two categories. Research and experience papers: These submissions should describe work that advances the current state of the art in support of advanced separation of concerns techniques in virtual machines and intermediate languages. Experience papers that are of broader interest and describe insights gained from practical applications. The page limit for these submissions is 10 pages. Position papers: These submissions present and defend the author’s position on a topic related to the broader area of the workshop. The page limit for these submissions is 4 pages.
Tue 24 OctDisplayed time zone: Tijuana, Baja California change
08:30 - 09:30 | |||
08:30 60mTalk | Invited talk: The JavaScriptCore Virtual Machine (joint with DLS 2017) VMIL Filip Pizlo Apple |
10:30 - 12:00 | |||
10:30 10mDay opening | Welcome to VMIL VMIL Adam Welc Huawei America Research Center | ||
10:40 40mTalk | Cross-ISA debugging in meta-circular VMs VMIL Christos Kotselidis The University of Manchester, Andrew Nisbet The University of Manchester, Foivos S. Zakkak , Nikos Foutris | ||
11:20 40mTalk | Accelerate JavaScript Applications by Cross-Compiling to WebAssembly VMIL |
13:30 - 15:00 | |||
13:30 60mTalk | Keynote: How Should We Train the Next Generation of VM Engineers? VMIL Mario Wolczko Oracle Labs | ||
14:30 40mTalk | Fusing Method Handle Graphs for Efficient Dynamic JVM Language Implementations VMIL Shijie Xu University of New Brunswick, David Bremner University of New Brunswick, Daniel Heidinga IBM |
15:30 - 17:00 | |||
15:30 90mOther | Panel - The future of language runtimes VMIL Tony Hosking Australian National University / Data61, Mario Wolczko Oracle Labs, David Grove IBM Research |
Instructions for Authors
For fairness reasons, all submitted papers should conform to the formatting instructions. Submissions that violate these instructions may be rejected without review.
Submission Site
Please take a moment to read the instructions below before using the submission site.
Concurrent Submissions
Papers must describe unpublished work that is not currently submitted for publication elsewhere as described by SIGPLAN’s Republication Policy. Submitters should also be aware of ACM’s Policy and Procedures on Plagiarism.
Format
Submissions should use the ACM SIGPLAN Conference acmart
Format with ‘sigplan’ Subformat, 10 point font, using the font family Times New Roman. All submissions should be in PDF format. If you use LaTeX or Word, please use the provided ACM SIGPLAN acmart
Templates provided here. Otherwise, follow the author instructions.
If you are formatting your paper using LaTeX, you will need to set the 10pt
option in the \documentclass
command. If you are formatting your paper using Word, you may wish to use the provided Word template that supports this font size. Please include page numbers in your submission with the LaTeX \settopmatter{printfolios=true}
command. Please also ensure that your submission is legible when printed on a black and white printer. In particular, please check that colors remain distinct and font sizes are legible.
Publication (Digital Library Early Access Warning)
AUTHORS TAKE NOTE: The official publication date is the date the proceedings are made available in the ACM Digital Library. This date may be up to two weeks prior to the first day of the conference. The official publication date affects the deadline for any patent filings related to published work.