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SPLASH 2017
Sun 22 - Fri 27 October 2017 Vancouver, Canada
Wed 25 Oct 2017 16:15 - 16:37 at Regency C - Dynamic Analysis Chair(s): Jonathan Aldrich

Non-volatile memory technologies such as PCM, ReRAM and STT-RAM allow data to be saved to persistent storage significantly faster than hard drives or SSDs. Many of the use cases for non-volatile memory requires persistent logging since it enables a set of operations to execute in an atomic manner. However, a logging protocol must handle reordering, which causes a write to reach the non-volatile memory before a previous write operation.

In this paper, we show that reordering results from two parts of the system: the out-of-order execution in the CPU and the cache coherence protocol. By carefully considering the properties of these reorderings, we present a logging protocol that requires only one round trip to non-volatile memory while avoiding expensive computations, thus increasing performance. We also show how the logging protocol can be extended to building a durable set (hash map) that also requires a single round trip to non-volatile memory for inserting, updating, or deleting operations.

Wed 25 Oct

splash-2017-OOPSLA
15:30 - 17:00: OOPSLA - Dynamic Analysis at Regency C
Chair(s): Jonathan AldrichCarnegie Mellon University
splash-2017-OOPSLA150893820000015:30 - 15:52
Talk
Christoffer Quist AdamsenAarhus University, Anders MøllerAarhus University, Frank TipNortheastern University
DOI
splash-2017-OOPSLA150893955000015:52 - 16:15
Talk
Benjamin P. WoodWellesley College, Man CaoOhio State University, Michael BondOhio State University, Dan GrossmanUniversity of Washington
DOI
splash-2017-OOPSLA150894090000016:15 - 16:37
Talk
DOI
splash-2017-OOPSLA150894225000016:37 - 17:00
Talk
Neville Grech, George FourtounisUniversity of Athens, Adrian FrancalanzaUniversity of Malta, Yannis SmaragdakisUniversity of Athens
DOI