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SPLASH 2017
Sun 22 - Fri 27 October 2017 Vancouver, Canada
Wed 25 Oct 2017 16:37 - 16:59 at Regency A - Synthesis Chair(s): Jonathan Edwards

System failures resulting from configuration errors are one of the major reasons for the compromised reliability of today’s software systems. Although many techniques have been proposed for configuration error detection, these approaches can generally only be applied after an error has occurred. Proactively verifying configuration files is a challenging problem, because 1) software configurations are typically written in poorly structured and untyped “languages”, and 2) specifying rules for configuration verification is challenging in practice. This paper presents VeriConf, a verification framework for general software configurations. Our framework works as follows: in the pre-processing stage, we first automatically derive a specification. Once we have a specification, we check if a given configuration file adheres to that specification. The process of learning a specification works through three steps. First, VeriConf parses a training set of configuration files (not necessarily all correct) into a well-structured and probabilistically-typed intermediate representation. Second, based on the association rule learning algorithm, VeriConf learns rules from these intermediate representations. These rules establish relationships between the keywords appearing in the files. Finally, VeriConf employs rule graph analysis to refine the resulting rules. VeriConf is capable of detecting various configuration errors, including ordering errors, integer correlation errors, type errors, and missing entry errors. We evaluated VeriConf by verifying public configuration files on Github, and we show that VeriConf can detect known configuration errors in these files.

Wed 25 Oct

splash-2017-OOPSLA
15:30 - 17:22: OOPSLA - Synthesis at Regency A
Chair(s): Jonathan Edwards
splash-2017-OOPSLA150893820000015:30 - 15:52
Talk
Venkatesh SrinivasanUniversity of Wisconsin - Madison, Ara VartanianUniversity of Wisconsin-Madison, USA, Thomas RepsUniversity of Wisconsin - Madison and GrammaTech, Inc.
DOI
splash-2017-OOPSLA150893954400015:52 - 16:14
Talk
Xinyu WangUT Austin, Isil DilligUT Austin, Rishabh SinghMicrosoft Research
DOI
splash-2017-OOPSLA150894088800016:14 - 16:37
Talk
Navid YaghmazadehUniversity of Texas, Austin, Yuepeng WangUniversity of Texas at Austin, Isil DilligUT Austin, Thomas Dillig
DOI
splash-2017-OOPSLA150894223200016:37 - 16:59
Talk
Mark SantolucitoYale University, Ennan ZhaiYale University, USA, Rahul DhodapkarMongoDB, USA, Aaron ShimMicrosoft, USA, Ruzica PiskacYale University
DOI
splash-2017-OOPSLA150894357600016:59 - 17:22
Talk
Xiaokang QiuPurdue University, Armando Solar-LezamaMIT CSAIL
DOI