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SPLASH 2017
Sun 22 - Fri 27 October 2017 Vancouver, Canada
Wed 25 Oct 2017 16:37 - 16:59 at Regency A - Synthesis Chair(s): Jonathan Edwards

System failures resulting from configuration errors are one of the major reasons for the compromised reliability of today’s software systems. Although many techniques have been proposed for configuration error detection, these approaches can generally only be applied after an error has occurred. Proactively verifying configuration files is a challenging problem, because 1) software configurations are typically written in poorly structured and untyped “languages”, and 2) specifying rules for configuration verification is challenging in practice. This paper presents VeriConf, a verification framework for general software configurations. Our framework works as follows: in the pre-processing stage, we first automatically derive a specification. Once we have a specification, we check if a given configuration file adheres to that specification. The process of learning a specification works through three steps. First, VeriConf parses a training set of configuration files (not necessarily all correct) into a well-structured and probabilistically-typed intermediate representation. Second, based on the association rule learning algorithm, VeriConf learns rules from these intermediate representations. These rules establish relationships between the keywords appearing in the files. Finally, VeriConf employs rule graph analysis to refine the resulting rules. VeriConf is capable of detecting various configuration errors, including ordering errors, integer correlation errors, type errors, and missing entry errors. We evaluated VeriConf by verifying public configuration files on Github, and we show that VeriConf can detect known configuration errors in these files.

Wed 25 Oct

Displayed time zone: Tijuana, Baja California change

15:30 - 17:22
SynthesisOOPSLA at Regency A
Chair(s): Jonathan Edwards
15:30
22m
Talk
Model-Assisted Machine-Code Synthesis
OOPSLA
Venkatesh Srinivasan University of Wisconsin - Madison, Ara Vartanian University of Wisconsin-Madison, USA, Thomas Reps University of Wisconsin - Madison and GrammaTech, Inc.
DOI
15:52
22m
Talk
Synthesis of Data Completion Scripts using Finite Tree Automata
OOPSLA
Xinyu Wang UT Austin, Isil Dillig UT Austin, Rishabh Singh Microsoft Research
DOI
16:14
22m
Talk
SQLizer: Query Synthesis from Natural Language
OOPSLA
Navid Yaghmazadeh University of Texas, Austin, Yuepeng Wang University of Texas at Austin, Isil Dillig UT Austin, Thomas Dillig
DOI
16:37
22m
Talk
Synthesizing Configuration File Specifications with Association Rule Learning
OOPSLA
Mark Santolucito Yale University, Ennan Zhai Yale University, USA, Rahul Dhodapkar MongoDB, USA, Aaron Shim Microsoft, USA, Ruzica Piskac Yale University
DOI
16:59
22m
Talk
Natural Synthesis of Provably-Correct Data-Structure Manipulations
OOPSLA
Xiaokang Qiu Purdue University, Armando Solar-Lezama MIT CSAIL
DOI